Intel Corporation (Santa Clara, CA) earned U.S. Patent 7,704,791 for packaging of integrated circuits with carbon nanotube arrays to enhance heat dissipation through a thermal interface
According to inventors Valery M. Dubin and Thomas S. Dory a layer of metal is formed on a backside of a semiconductor wafer. Then, a porous layer is formed on the metal layer. A barrier layer of the porous layer at the bottom of the pores is thinned down. Then, a catalyst is deposited at the bottom of the pores. Carbon nanotubes are then grown in the pores. Another layer of metal is then formed over the porous layer and the carbon nanotubes. The semiconductor wafer is then separated into microelectronic dies. The dies are bonded to a semiconductor substrate, a heat spreader is placed on top of the die, and a semiconductor package resulting from such assembly is sealed. A thermal interface is formed on the top of the heat spreader. Then a heat sink is placed on top of the thermal interface.
As illustrated in FIG. 13, after the package (68) has been sealed a thermal interface (70) is added to the top of the heat spreader (62). A heat sink (72) is then placed on top of the package (68) to form a complete electronic assembly (74). The heat sink 72 is a thermally conductive member having a base portion (76) and heat sink fins (78). The heat sink( 72) has a rectangular cross-section a width (80) of 140 mm.
One advantage is that a thermal interface with a higher thermal conductivity is provided, especially when compared with thermal greases and metallic layers. Another advantage is that the thermal interface has a high mechanical strength. A further advantage is that a chemical bond is provided between the carbon nanotubes and the integrated circuit which promotes transfer of heat. A further advantage is that an improved contact between the integrated circuit and the thermal materials is provided. A further advantage is that a thinner and more uniform thermal interface is provided.