Tuesday, March 30, 2010

Dongbu Electronics Reveals Nano-Scale Flash Memory Devices with Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) Structure

Dongbu Electronics Co., Ltd. (Seoul, KR)  earned U.S. Patent  7,687,345  for its nano-scale flash memory devices having a silicon-oxide-nitride-oxide-silicon (SONOS) structure and its related manufacturing method which is capable of sufficiently maintaining the length of a channel even though the width of a control gate is very narrow.

According to inventor Sang Bum Lee, the method of manufacturing a flash memory device is capable of forming a control gate having a nano-scale critical dimension (CD) without performing a separate process of patterning the control gate. Meanwhile, expensive exposure equipment must be used to pattern the control gate on a nano scale. However, according to the present invention, the control gate having a nano-scale CD can be formed without nano-scale exposure equipment.

Dongbu has provided a flash memory device, which includes source and drain diffusion regions on opposite sides of a trench in an active region of a semiconductor substrate, a control gate inside the trench and protruding upward from the substrate, a charge storage layer between an inner wall of the trench and the control gate, and insulating spacers on opposite sidewalls of the control gate with the charge storage layer therebetween. Here, the charge storage layer may have an oxide-nitride-oxide (ONO) structure. Further, a depth from a surface of the substrate to a bottom of the trench may be greater than that of each of the source and drain diffusion regions.

The manufacturing method comprises the steps of: (a) forming a hard mask layer on an active region of a semiconductor substrate, (b) patterning the hard mask layer (and etching the exposed substrate) to form a first trench, (c) forming hard mask spacers on an inner wall of the first trench, (d) etching the substrate to a predetermined depth using the hard mask layer and the hard mark spacers as an etch mask to form a second trench on the substrate, (e) forming a charge storage layer on an inner wall of each of the hard mark spacers and second trench, (f) forming a conductive layer on the charge storage layer to fill a remaining gap in the second trench and the hard mask spacers, and optionally (g) removing the hard mask layer and the hard mask spacers to form a control gate that has the charge storage layer between the substrate and the control gate.

The control gate may protrude upward beyond the substrate from the second trench. The charge storage layer may be between an inner wall of the trench and the control gate. Further, the method may further comprise the step of forming lightly doped drain regions, and source and drain diffusion regions, both of which are separated by the second trench, in the substrate. The method may further comprise the step of forming insulating spacers on opposite sidewalls of the control gate.

The SONOS type flash memory may have better reliability than the floating gate type flash memory, and it is possible to perform programming and erasing operations at low voltage, because the gate insulating layer includes a charge storage layer (usually an oxide-nitride-oxide (ONO) structure which comprises a silicon oxide tunneling layer, a silicon nitride trapping layer, and a silicon oxide blocking layer), and because a charge is trapped in a deep energy level corresponding to the nitride layer.

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